The majority of modern day data systems are synchronous data systems in the sense that the internal operation of the digital logic forming systems is paced or controlled by a "clock". The clock is a source of timing pulses, usually of fixed frequency, from which the other digital signals required to correctly control the system can be derived. The frequency of the clock is typically determined from the frequency of an oscillator internal to the system. The frequency and digital pulse width characteristics of the clock used in a given system vary widely depending upon the system requirement to be fulfilled. In systems in which the speed of operations is dependent upon this speed of a human interface, for example, a manually operated keyboard, or in systems where other physical limitations affect speed such as the frequency limitations imposed by transmitting audio information over a telephone line, a very low speed clock may be desirable. In other systems, such as microprocessor systems, where it is desirable to perform a large number of program execution cycles and memory cycles during the time interval between two events, a high frequency clock is required. Thus, a common situation is to have a set of digital subsystems having high and low frequency internal clocks which are timed asynchronously with respect to each other all operating within the same system environment. A problem arises when it is required that data be transferred between such subsystems. The problem is that digital information may be mutilated or lost if the time of data transfer prescribed by the clock of one system happens to occur during a transition of a clock of the other data system in such a way that a logic element defining digital information to be transferred is in a logically indeterminate state.